CMUCL commit: amd64-dd-branch src/compiler/amd64 (vm.lisp)

[Raymond Toy]

    Date: Wednesday, November 4, 2009 @ 12:05:43
  Author: rtoy
    Path: /project/cmucl/cvsroot/src/compiler/amd64
     Tag: amd64-dd-branch

Modified: vm.lisp

Don't use the extra 64-bit regs for descriptors yet.  Some
instructions can't handle them yet, especially the FPU instructions.


---------+
 vm.lisp |   10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)


Index: src/compiler/amd64/vm.lisp
diff -u src/compiler/amd64/vm.lisp:1.2.36.1 src/compiler/amd64/vm.lisp:1.2.36.2
--- src/compiler/amd64/vm.lisp:1.2.36.1	Mon Nov  2 09:29:46 2009
+++ src/compiler/amd64/vm.lisp	Wed Nov  4 12:05:43 2009
@@ -7,7 +7,7 @@
 ;;; Scott Fahlman or slisp-group at cs.cmu.edu.
 ;;;
 (ext:file-comment
- "$Header: /project/cmucl/cvsroot/src/compiler/amd64/vm.lisp,v 1.2.36.1 2009-11-02 14:29:46 rtoy Exp $")
+ "$Header: /project/cmucl/cvsroot/src/compiler/amd64/vm.lisp,v 1.2.36.2 2009-11-04 17:05:43 rtoy Exp $")
 ;;;
 ;;; **********************************************************************
 ;;;
@@ -249,7 +249,13 @@
 
   ;; Pointer descriptor objects.  Must be seen by GC.
   (descriptor-reg registers
-		  :locations #.qword-regs
+		  ;; Don't use the extra qword regs yet, until we get
+		  ;; all of the instruction definitions updated to
+		  ;; handle the extra regs.  (In particular, the FP
+		  ;; instructions can't handle this yet.)
+		  
+		  ;;:locations #.qword-regs
+                  :locations (#.rax-offset #.rcx-offset #.rdx-offset #.rbx-offset #.rsi-offset #.rdi-offset) 
 		  :element-size 2
 		  :constant-scs (constant immediate)
 		  :save-p t